Power10
Power10 SCM | |
| General information | |
|---|---|
| Launched | 2021 |
| Designed by | IBM, OpenPower partners |
| Common manufacturer | |
| Performance | |
| Max. CPU clock rate | +3.5 GHz to +4 GHz |
| Cache | |
| L1 cache | 48+32 KB per core |
| L2 cache | 2 MB per core |
| L3 cache | 120 MB per chip |
| Architecture and classification | |
| Technology node | 7 nm |
| Microarchitecture | P10 |
| Instruction set | Power ISA (Power ISA v.3.1) |
| Physical specifications | |
| Cores |
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| Package |
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| Socket |
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| History | |
| Predecessor | POWER9 |
| POWER, PowerPC, and Power ISA architectures |
|---|
| NXP (formerly Freescale and Motorola) |
| IBM |
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| IBM/Nintendo |
| Other |
| Related links |
| Cancelled in gray, historic in italic |
Power10 is a superscalar, multithreading, multi-core microprocessor family, based on the open source Power ISA, and announced in August 2020 at the Hot Chips conference; systems with Power10 CPUs. Generally available from September 2021 in the IBM Power10 Enterprise E1080 server.
The processor is designed to have 15 cores available, but a spare core will be included during manufacture to cost-effectively allow for yield issues.
Power10-based processors will be manufactured by Samsung using a 7 nm process with 18 layers of metal and 18 billion transistors on a 602 mm2 silicon die.
The main features of Power10 are higher performance per watt and better memory and I/O architectures, with a focus on artificial intelligence (AI) workloads.