ARM Cortex-A76
| General information | |
|---|---|
| Launched | 2018 |
| Designed by | ARM Holdings |
| Performance | |
| Max. CPU clock rate | to 3 GHz in phones, 3.3 GHz in tablets/laptops |
| Address width | 40-bit |
| Cache | |
| L1 cache | 128 KiB (64 KiB D-cache and 64 KiB I-cache with parity) per core |
| L2 cache | 128–512 KiB per core |
| L3 cache | 512 KiB–4 MiB (optional) |
| Architecture and classification | |
| Instruction set | ARMv8-A: A64, A32, T32 |
| Extensions | |
| Physical specifications | |
| Cores |
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| Co-processor | ARM Cortex-A55 (optional) |
| Products, models, variants | |
| Product code name |
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| Variant | |
| History | |
| Predecessors | ARM Cortex-A75 ARM Cortex-A73 ARM Cortex-A72 |
| Successor | ARM Cortex-A77 |
The ARM Cortex-A76 is a central processing unit (CPU) core implementing the 64-bit ARMv8.2-A architecture, designed by Arm Holdings' design center in Austin, Texas. Compared to its predecessor, the Cortex-A75, ARM claimed performance improvements of up to 25% in integer operations and 35% in floating-point operations.